A template-based sub-optimal content distribution for D2D content sharing networks

We propose Templatized Elastic Assignment (TEA), a light-weight scheme for mobile cooperative caching networks. It consists of two components, (1) one to calculate a sub-optimal distribution of each situation and (2) finegrained ID management by base stations (BSs) to achieve the calculated distribution. The former is modeled from findings that the desirable distribution plotted in a semilog graph forms a downward straight line with which the slope and Yintercept epend on the bias of request and total cache capacity, respectively. The latter is inspired from the identifier (ID)-based scheme, which ties devices and content by a randomly associated ID. TEA achieved the calculated distribution with IDs by using the annotation from base stations (BSs), which is preliminarily calculated by the template in a fine-grained density of devices. Moreover, such fine-grained management secondarily standardizes the cached content among multiple densities and enables the reuse of the content in devices from other BSs. Evaluation results indicate that our scheme reduces (1) 8.3 times more traffic than LFU and achieves almost the same amount of traffic reduction as with the genetic algorithm, (2) 45 hours of computation into a few seconds, and (3) at most 70% of content replacement across multiple BSs

Computational Intelligence Inspired Data Delivery for Vehicle-to-Roadside Communications

We propose a vehicle-to-roadside communication protocol based on distributed clustering where a coalitional game approach is used to stimulate the vehicles to join a cluster, and a fuzzy logic algorithm is employed to generate stable clusters by considering multiple metrics of vehicle velocity, moving pattern, and signal qualities between vehicles. A reinforcement learning algorithm with game theory based reward allocation is employed to guide each vehicle to select the route that can maximize the whole network performance. The protocol is integrated with a multi-hop data delivery virtualization scheme that works on the top of the transport layer and provides high performance for multi-hop end-to-end data transmissions. We conduct realistic computer simulations to show the performance advantage of the protocol over other approaches

Accelerating BLAST Computation on an FPGA-enhanced PC Cluster

This paper introduces an FPGA-based scheme to accelerate mpiBLAST, which is a parallel sequence alignment algorithm for computational biology. Recent rapidly growing biological databases for sequence alignment require highthroughput storage and network rather than computing speed. Our scheme utilizes a specialized hardware configured on an FPGA-board which connects flash storage and other FPGAboards directly. The specialized hardware configured on the FPGAs, we call a Data Stream Processing Engine (DSPE), take a role for preprocessing to adjust data for high-performance multi- and many- core processors simultaneously with offloading system-calls for storage access and networking. DSPE along the datapath achieves in-datapath computing which applies operations for data streams passing through the FPGA. Two functions in mpiBLAST are implemented using DSPE to offload operations along the datapath. The first function is database partitioning, which distributes the biological database to multiple computing nodes before commencing the BLAST processes. Using DSPE, we observe a 20-fold improvement in computation time for the database partitioning operation. The second function is an early part of the BLAST process that determines the positions of sequences for more detailed computations. We implement IDP-BLAST (In-datapath BLAST), which annotates positions in data streams from solid-state drives. We show that IDP-BLAST accelerates the computation time of the preprocess of BLAST by a factor of three hundred by offloading heavy operations to the introduced special hardware

Sharing Computing Resources with Virtual Machines by Transparent Data Access

Cloud computing has rapid growth in enterprise and academic areas. Computing platform makes up the transition from physical servers to virtual machines (VMs) in the cloud. Instead of many advantages, VMs remain several problems to employ effective utilization of physical computing resources, especially many-core accelerators. Even though GPGPU is a hopeful solution for high-load applications, existing methods to utilize GPUs from VMs are subjected to various restraints. In order to solve this problem, we propose a flexible method to share external computing resources by providing transparent access for data in the VMs. By committing commands to a computing host which processes the jobs as substitution, VMs can process high load jobs as necessary even if the VM has a tiny configuration. The computing host mounts the working directories in the VMs and enqueues jobs committed by the VMs. Experimental results show that the overhead of our implementation is sufficiently small in the low I/O load processes

A Light-weight Content Distribution Scheme for Cooperative Caching in Telco-CDNs

A key technique to reduce the rapid growing of video-on-demand’s traffic is a cooperative caching strategy aggregating multiple cache storages. Many internet service providers have considered the use of cache servers on their networks as a solution to reduce the traffic. Existing schemes often periodically calculate a sub-optimal allocation of the content caches in the network. However, such approaches require a large computational overhead that cannot be amortized in a presence of frequent changes of the contents’ popularities. This paper proposes a light-weight scheme for a cooperative caching that obtains a sub-optimal distribution of the contents by focusing on their popularities. This was made possible by adding color tags to both cache servers and contents. In addition, we propose a hybrid caching strategy based on Least Frequently Used (LFU) and Least Recently Used (LRU) schemes, which efficiently manages the contents even with a frequent change in the popularity. Evaluation results showed that our light-weight scheme could considerably reduce the traffic, reaching a sub-optimal result. In addition, the performance gain is obtained with a computation overhead of just a few seconds. The evaluation results also showed that the hybrid caching strategy could follow the rapid variation of the popularity. While a single LFU strategy drops the hit ratio by 13.9%, affected by rapid popularity changes, our proposed hybrid strategy could limit the degradation to only 2.3%

Wire-Speed Implementation of Sliding-Window Aggregate Operator over Out-of-Order Data Streams

This paper shows the design and evaluation of an FPGA-based accelerator for sliding-window aggregation over data streams with out-of-order data arrival. We propose an order-agnostic hardware implementation technique for windowing operators based on a one-pass query evaluation strategy called Window-ID, which is originally proposed for software implementation. The proposed implementation succeeds to process out-of-order data items, or tuples, at wire speed due to the simultaneous evaluations of overlapping sliding-windows. In order to verify the effectiveness of the proposed approach, we have also implemented an experimental system as a case study. Our experiments demonstrate that the proposed accelerator with a network interface achieves an effective throughput around 760 Mbps or equivalently nearly 6 million tuples per second, by fully utilizing the available bandwidth of the network interface

An Efficient and Scalable Implementation of Sliding-Window Aggregate Operator on FPGA

This paper presents an efficient and scalable implementation of an FPGA-based accelerator for sliding-window aggregates over disordered data streams. With an increasing number of overlapping sliding-windows, the window aggregates have a serious scalability issue, especially when it comes to implementing them in parallel processing hardware (e.g., FPGAs). To address the issue, we propose a resource-ef?cient, scalable, and order-agnostic hardware design and its implementation by examining and integrating two key concepts, called Window-ID and Pane, which are originally proposed for software implementation, respectively. Evaluation results show that the proposed implementation scales well compared to the previous FPGA implementation in terms of both resource consumption and performance. The proposed design is fully pipelined and our implementation can process out-of-order data items, or tuples, at wire speed up to 200 million tuples per second

Throttling Control for Bufferless Routing in On-Chip Networks

As the number of core integration on a single die grows, buffers consume significant energy, and occupy chip area. A bufferless deflection outing that eliminates router’s input port buffers can considerably help saving energy and chip area while providing similar performance of xisting buffered routing, especially for low-to-medium network loads. However when congestion increases, the bufferless frequently causes flits deflections, and misrouting leading to a degradation of network performance. In this paper, we propose IRT(Injection Rate Throttling), a ocal throttling mechanism that reduces deflection and misrouting for high-load bufferless networks. IRT provides injection rate control independently for each network node, allowing to reduce network congestion. Our simulation results based on a cycle-accurate simulator show that using IRT, IRT reduces average transmission latency by 8.65% compared to traditional bufferless routing

Postmarketing surveillance of safety and effectiveness of etanercept in Japanese patients with rheumatoid arthritis

Our aim was to evaluate real-world safety and effectiveness in a 6-month postmarketing surveillance study covering all Japanese patients with rheumatoid arthritis (RA) who received etanercept during a 2-year period. Data for 13,894 patients (1334 sites) enrolled between March 2005 and April 2007 were collected. Adverse events (AEs) and serious adverse events (SAEs) were reported in 4336 (31.2%) and 857 (6.2%) patients, respectively. The most frequent AEs were injection site reactions (n = 610, 4.4%) and rash (n = 339, 2.4%), whereas pneumonia (n = 116, 0.8%) and interstitial lung disease (n = 77, 0.6%) were the most frequent SAEs. Significant improvement in the proportion of patients with a good European League Against Rheumatism (EULAR) response was observed from week 4 (17.6%) to week 24 (31.6%) (p < 0.001); 84.3% of patients had good or moderate EULAR responses at week 24. The percentage of patients achieving remission increased significantly from week 4 (9.3%) to week 24 (18.9%) (p < 0.001). Patients with early moderate RA were less likely to experience SAEs and were more likely to achieve remission compared with patients with more severe disease. The safety and effectiveness of etanercept was demonstrated in Japanese patients in one of the largest observational trials conducted thus far in RA patients treated with biologics